RS  R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
=== === === === === === === === === ===
 1   1   D7  D6  D5  D4  D3  D2  D1  D0 

Details
Reads binary D7 D6 D5 D4 D3 D2 D1 D0 from the CG RAM or DD RAM.
The previous designation determines whether the CG RAM or DD RAM is to be read.
Read data from DD RAM if the command follows a previous Set DD RAM Address command, or
read data from CG RAM if the command follows a previous Set CG RAM Address command.

Before entering the read instruction, you must execute either 
the CG RAM or DD RAM address set instruction. If you don't, 
the first read data will be invalidated. When serially executing
the "read" instruction, the next address data is normally read 
from the second read. The "address set" instruction need not
be executed just before the "read" instruction when
shifting the cursor by cursor shift instruction (when
reading out DD RAM). The cursor shift instruction
operation is the same as that of the DD RAM's address
set instruction.

After a read, the entry mode automatically increases or decreases the address by 1. However, display shift is not executed no matter what the entry mode is.

Note:
The address counter (AC) is automatically incremented or decremented by 1 after "write" instructions to either CG RAM or DD RAM. RAM data selected by the AC cannot be read out even if "read" instructions are executed. The conditions for correct data read out are: execute either the address set instruction or cursor shift instruction (only with DD RAM), just before reading out execute the "read" instruction from the second time the "read" instruction is serial.